Wednesday 26 September 2007

Let’s hear it for Power6

A while ago I mentioned in this blog about IBM’s ECLipz project – their unannounced and mainly rumoured plan to create a single chip for System i, System p, and System z (hence the last three letters of the acronym). The big leap forward in this plan (according to rumour mills on the Web and elsewhere) was the much-touted Power6 chip, which IBM finally unveiled at the end of May.

Before we look at whether it fulfils any of the ECLipz hype, let’s see what was actually in the announcement. Running at a top speed of 4.7GHz, the microprocessor offers double the speed of a Power5 chip, yet still uses about the same amount of electricity to run and cool it (all part of the “green machine room”). This means customers can either double their performance or cut their power consumption in half by running at half the clock speed.


And while we’re talking “green”, the processor includes techniques to conserve power and reduce heat. In fact, the processor can be dynamically turned off when there is no useful work to be done and turned back on when there are instructions to be executed. Also, if extreme temperatures are detected, the Power6 chip can reduce its rate of execution to remain within an acceptable, user-defined, temperature range.


In terms of that other hot topic, virtualization, Power6 supports up to 1024 LPARs (Logical PARtitions). It also offers “live partition mobility”, which allows the resources in a specified LPAR to be increased or decreased, but, more interestingly, the applications in a virtual machine can be quiesced, the virtual machine can be moved from one physical server to another, and then everything restarts as though nothing had happened.


The new Systems Director Virtualization Manager eases virtualization management by including a Web-based interface and provides a single set of interfaces for managing all Power-based hardware and virtual partitions; and for discovering virtualized resources of the Virtual I/O server. Virtualization Manager 1.2 supports Power6 chips. It also supports Xen hypervisors included in Red Hat and Novell Linux distributions, as well as VMware, XenSource, and Microsoft Virtual Server.


As far as Project ECLipz goes, the Power6 chip does have redundancy features and support for mainframe instructions (including 50 new floating-point instructions designed to handle decimal maths and binary and decimal conversions). It’s the first Unix processor able to calculate decimal floating point arithmetic in hardware – previously calculations involving decimal numbers with floating decimal points were done using software. There’s also an AltiVec unit (a floating-point and integer processing engine), compliance with IBM’s Power ISA V2.03 specification, and support for Virtual Vector Architecture-2 (ViVA-2), allowing a combination of Power6 nodes to function as a single Vector processor.


And in case you were wondering, IBM listed benchmark tests showing the Power6 chip was faster than Lewis Hamilton’s Formula 1 car, and perhaps hinted that H-P’s Itanium-based machines may as well just give up now!

No comments: